This invention relates generally to current mirror circuits and particularly to an improved current mirror circuit having minimum delay.
Current mirrors are extensively used in integrated circuits when it is desired to have the current in one transistor circuit follow or "mirror" the current in another transistor circuit. As is well known, the output current in the second transistor will "follow" the input current in the first transistor, maintaining substantially the same amplitude ratio and differing only by the base-emitter bias currents of the two transistors. In a so-called improved current mirror circuit a bias transistor is added to supply the base-emitter currents of the two mirror transistors. The difference between the output current and the input current is thereby reduced by the h factor of the bias transistor, which is normally around 200 to 300. However, current mirror circuits are not often used in circuit applications where the input current is of a switching type and goes through zero transitions because of the inherent emitter-base capacitance of the transistors which must be charged before the base-emitter voltages will rise to permit current flow in the collector circuits. The effect is a delay wherein the output current lags the input current. Consequently current mirrors have been restricted to circuits in which the input currents do not go to zero on a regular basis, such as occurs in an oscillator or switching circuit.
On the other hand, current mirrors have been extensively used in environments where the input current may irregularly go to zero. The delay due to transistor emitter-base capacitance is compensated somewhat by increasing current flow, which decreases delay time because the emitter-base capacitance is charged more quickly with increased current flow. However, a larger current flow produce more heat which must be dissipated and is not a desirable solution. The use of larger currents than necessary simply burdens the design, especially in integrated circuits.
For oscillators and switching circuits, the delay manifests itself as a phase error. The delay is nearly constant for given operating conditions and imposes a low maximum frequency of operation on the circuit. Also, these errors are generally not controllable in that they are subject to substantial variation with component and circuit tolerances, manufacturing techniques and temperature. Thus there is a need in the art for a current mirror circuit that has minimum delay.